goldeneye-pc-port

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2 Commits

Include renames

Author	SHA1	Message	Date
James Dansereau	52539d10de	Prepare for public release - README, LICENSE (MIT for the port layer), NOTICE, CONTRIBUTING. - Restructure docs: internals.md, porting-notes.md, dev-process.md + dev/agentic-development.md (the research write-up), dev/ (raw record). - Replace decomp status-badge CI with a PC-port validate workflow. - Remove session/agent scaffolding and stale planning docs from the tree. - Add .gitattributes (normalize line endings to LF); add screenshots. The pre-2026-08 history is the GoldenEye 007 decompilation by Larry Ficken (KholdFuzion) and contributors, preserved unchanged. The PC-port work from 2026-08-17 on is mine.	2026-09-01 19:28:59 -04:00
James Dansereau	cd6cc158b6	Add PC port scaffolding (CMake build + port layer) Initial scaffolding for a PC port of GoldenEye 007, modeled on the Perfect Dark PC port (same Rare "Indy" engine). The N64 build (Makefile + IDA) is untouched; the PC build is a parallel CMake build. Build: - CMakeLists.txt: SDL2 + zlib + OpenGL. Compiles src/game/*.c + curated engine files + libultra audio/gu + port/. Per-region macro sets (ROMID US/EU/JP) mirror the N64 Makefile's LCDEFS exactly. - build-pc.sh, cmake/: configure+build helper and target/SDL2 modules. Port layer (port/): - video/audio/input/fs/romdata/config/system/mixer: stubs with TODO(Phase N) markers and correct interfaces. - libultra.c: libultra OS shims (message queues, VI, PI, AI, EEPROM, controller, PFS/motor no-ops, region-gated osTvType). - gesched.c: software-RSP scheduler replacing src/sched.c task submission. - n64stubs.c: inert stubs for N64-boot + rmon symbols. - random.c: PRNG ported verbatim from src/random.s (bit-exact). - ucode.c: RSP/ASP/GSP microcode segment markers (dummies; Phase 3 TODO). Docs: - docs/PCPortResearch.md: architecture, GE-specific deltas, phased plan, and the scaffolding review (findings A1-A4/B1-B4/C1-C2 + resolutions). - PORTING.md: top-level entry point. See docs/PCPortResearch.md for the full plan.	2026-08-17 19:17:06 -04:00

Author

SHA1

Message

Date

James Dansereau

52539d10de

Prepare for public release

- README, LICENSE (MIT for the port layer), NOTICE, CONTRIBUTING.
- Restructure docs: internals.md, porting-notes.md, dev-process.md +
  dev/agentic-development.md (the research write-up), dev/ (raw record).
- Replace decomp status-badge CI with a PC-port validate workflow.
- Remove session/agent scaffolding and stale planning docs from the tree.
- Add .gitattributes (normalize line endings to LF); add screenshots.

The pre-2026-08 history is the GoldenEye 007 decompilation by Larry Ficken
(KholdFuzion) and contributors, preserved unchanged. The PC-port work from
2026-08-17 on is mine.

2026-09-01 19:28:59 -04:00

James Dansereau

cd6cc158b6

Add PC port scaffolding (CMake build + port layer)

Initial scaffolding for a PC port of GoldenEye 007, modeled on the
Perfect Dark PC port (same Rare "Indy" engine). The N64 build
(Makefile + IDA) is untouched; the PC build is a parallel CMake build.

Build:
- CMakeLists.txt: SDL2 + zlib + OpenGL. Compiles src/game/*.c + curated
  engine files + libultra audio/gu + port/. Per-region macro sets
  (ROMID US/EU/JP) mirror the N64 Makefile's LCDEFS exactly.
- build-pc.sh, cmake/: configure+build helper and target/SDL2 modules.

Port layer (port/):
- video/audio/input/fs/romdata/config/system/mixer: stubs with
  TODO(Phase N) markers and correct interfaces.
- libultra.c: libultra OS shims (message queues, VI, PI, AI, EEPROM,
  controller, PFS/motor no-ops, region-gated osTvType).
- gesched.c: software-RSP scheduler replacing src/sched.c task submission.
- n64stubs.c: inert stubs for N64-boot + rmon symbols.
- random.c: PRNG ported verbatim from src/random.s (bit-exact).
- ucode.c: RSP/ASP/GSP microcode segment markers (dummies; Phase 3 TODO).

Docs:
- docs/PCPortResearch.md: architecture, GE-specific deltas, phased plan,
  and the scaffolding review (findings A1-A4/B1-B4/C1-C2 + resolutions).
- PORTING.md: top-level entry point.

See docs/PCPortResearch.md for the full plan.

2026-08-17 19:17:06 -04:00