James Dansereau 330b2bae46 PC port: phase 2 — Plan B executed (D50): offline model sidecars + port plumbing; texCopyGdls w1 fix ...

- tools_pc/d43_emit.py: full emit pass, 512/512 round-trip validated;
  data/pcmodels-<region>/pcmodels.bin + manifest.csv (gitignored, regenerate)
- port/src/pcmodels.c(+h): cart-extension reservation, sidecar copy, one-shot
  file_resource_table patch; romdata.c/h extended
- objecthandler_2.c: #ifdef PORT hook — pcmodelsPatchTable() + poolRemaining=0
  reset (closes D48.3/R6 reload hazard)
- language.c/textrelated.c: runtime C fixups for lang-bank BE offset tables
  (romdataFixupLangBank) and font re-layout (romdataFontPcSize/FixupFont)
- front.c: legal-screen uninitialized-pointer UB seed (N64 survived by luck)
- tex.c (D50.6): texCopyGdls copied only w0 of each 16B Gfx slot on PC —
  compaction scratch kept stale mempool w1s -> garbage G_SETTIMG -> OOB in
  import_texture_rgba16. Full-slot copy under #ifdef PORT; byte-proven vs
  PlegalpageZ sidecar (w0s match, w1s stale). Model GDLs now execute.

2026-08-23 10:22:03 -04:00

..

d43_chainbound.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_convert.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_cover.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_decode.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_emit.py

PC port: phase 2 — Plan B executed (D50): offline model sidecars + port plumbing; texCopyGdls w1 fix

2026-08-23 10:22:03 -04:00

d43_fullwalk.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_gdldump.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_gdlhist.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_gdlorder.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_gdlseq.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_invariants.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_layout1.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_layout.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_layoutprobe.c

PC port: phase 2 — Plan B executed (D50): offline model sidecars + port plumbing; texCopyGdls w1 fix

2026-08-23 10:22:03 -04:00

d43_lutscan.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_pointusage.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_seg5.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_seg5ops.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_seg5vtx2.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_seg5vtx.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_sizes2.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

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d43_sizes.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_tree_dump.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_vtxfmt.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

d43_walk.py

PC port: phase 2 — D48 review: re-plan D43 as offline pre-conversion (Plan B)

2026-08-22 18:43:04 -04:00

disasm.py

PC port: Phase 1.5 — root-cause D32 Part B (D33): ROM big-endian

2026-08-21 20:18:38 -04:00

romverify.c

PC port: phase 1.5 — ROM dump verification groundwork

2026-08-21 20:29:03 -04:00